Q. The minimum number of NAND gates required to implement the Boolean function A +AB̅ + AB̅C is equal to

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Q. A Karnaugh map with 4 variables has

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Q. An 8 bit data is to be entered into a parallel in register. The number of clock pulses required is

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Q. Which of the following is error correcting code?

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Q. A universal shift register can shift

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Q. Available multiplexer IC package can have a maximum of 8 inputs.

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Q. Which display device resembles vacuum tube?

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Q. The number of inputs and outputs of a full adder are

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Q. A VF display operates on the principle of a vacuum diode.

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Q. In a 3 input NAND gate, the number of states in which output is 1 equals

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Q. In a mod-12 counter the input clock frequency is 10 kHz. The output frequency is

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Q. What will be BCD number when the output is 0.37 V?

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Q. The first machine cycle of an instruction is always

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Q. A counter has N flip flops. The total number of states are

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Q. Out of S, R, J, K, Preset, Clear inputs to flip flops, the synchronous inputs are

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Q. Assertion (A): A demultiplexer can be used as a decoder.

Reason (R): A demultiplexer can be built by using AND gates only.

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Q. Assertion (A): The output of a NOR gate is equal to the complement of OR of input variables.

Reason (R): A XOR gate is a universal gate.

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Q. The number of bits in ASCII is

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Q. 4 bit 2's complement representation of a decimal number is 1000. The number is

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Q. In a D latch

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