Question
Reason (R): A serial in-serial out shift register can be used to introduce a time delay.
a.
Both A and R are correct and R is correct explanation of A
b.
Both A and R are correct but R is not correct explanation of A
c.
A is true, R is false
d.
A is false, R is true
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Q. Assertion (A): In a parallel in-serial out shift register data is loaded one bit-at a time. Reason (R): A serial in-serial out shift register can be used to introduce a time...
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