Q. The minimum number of 2 input NAND gates required to implement Boolean function A B̅ C is A, B, C are available is

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Q. Single parity check is not reliable in case of

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Q. A 0 to 6 counter consist of 3 flip-flop and a combinational circuit of 2 input gates. The combinational circuit consist of

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Q. In an op-amp a virtual ground is a ground for

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Q. Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY) contain after SBI 0B7H?

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Q. The Central Processing Unit (CPU) of the 16-processor system developed by hardware and software teams of C-DOT, Bangalore is configured around

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Q. For NOR gate SR flip-flop, the 'no change' condition is

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Q. A depletion type NMOS is operated in enhancement mode. Vp = - 4 volts. For VGS = + 3 volts as VDS is increased, ID becomes nearly constant when Vps equals

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Q. Which one of the following is D/A conversion technique?

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Q. Assuming accumulator contain A 64 and the carry is set (1). What will accumulator (A) and carry (CY) contain after ANA A?

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Q. A number is expressed in binary 2's complement as 10011 decimal equivalent value is

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Q. In INHIBIT operation

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Q. Which of the following will be hexadecimal number just for prior to F52B?

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Q. A pair of 21114s can store __________ words of __________ bits each.

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Q. In hexadecimal number system, A is equal to decimal number

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Q. Which binary addition is incorrect?

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Q. Data can be changed from spatial code to temporal code and vice-versa by using

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Q. Precisely 1 K byte means

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Q. In 8156, the lower times byte is addressed with 24 H, and the upper times byte with

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Q. In the CMOS inverter

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