Digital Electronics MCQs

Welcome to our comprehensive collection of Multiple Choice Questions (MCQs) on Digital Electronics, a fundamental topic in the field of Electronics and Communication Engineering. Whether you're preparing for competitive exams, honing your problem-solving skills, or simply looking to enhance your abilities in this field, our Digital Electronics MCQs are designed to help you grasp the core concepts and excel in solving problems.

In this section, you'll find a wide range of Digital Electronics mcq questions that explore various aspects of Digital Electronics problems. Each MCQ is crafted to challenge your understanding of Digital Electronics principles, enabling you to refine your problem-solving techniques. Whether you're a student aiming to ace Electronics and Communication Engineering tests, a job seeker preparing for interviews, or someone simply interested in sharpening their skills, our Digital Electronics MCQs are your pathway to success in mastering this essential Electronics and Communication Engineering topic.

Note: Each of the following question comes with multiple answer choices. Select the most appropriate option and test your understanding of Digital Electronics. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

So, are you ready to put your Digital Electronics knowledge to the test? Let's get started with our carefully curated MCQs!

Digital Electronics MCQs | Page 31 of 117

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Q301.
F's complement of (2BFD)hex is
Discuss
Answer: (c).D 402
Q302.
A 4 bit ripple counter uses flip flops with propagation delay of 50 ns each. The maximum clock frequency which can be used is
Discuss
Answer: (a).5 MHz
Q303.
An AND gate has two inputs A and B and one inhibit input S. Out of total 8 input states, output is 1 in
Discuss
Answer: (a).1 state
Discuss
Answer: (c).10Cโ‚โ‚†
Discuss
Answer: (c).master is positively clocked and slave is negatively clocked
Q306.
A pulse train with a 1 MHz frequency is counted using a 1024 modulus ripple counter using JK flip flops. The maximum propagation delay for each flip-flop should be
Discuss
Answer: (d).0.1 ฮผs
Q307.
What will be maximum input that can be converted for a 6 bit dual slope A/D converter uses a reference of -6v and a 1 MHz clock. It uses a fixed count of 40 (101000).
Discuss
Answer: (b).9.45
Q308.
If number of information bits is 11, the number of parity bits in Hamming code is

a.

5

b.

4

c.

3

d.

2

Discuss
Answer: (b).4
Q309.
The number of digit 1 present in the binary representation of 3 x 512 + 7 x 64 + 5 x 8 + 3 is
Discuss
Answer: (b).9
Q310.
A full adder adds
Discuss
Answer: (b).3 bits