Digital Electronics MCQs

Welcome to our comprehensive collection of Multiple Choice Questions (MCQs) on Digital Electronics, a fundamental topic in the field of Electronics and Communication Engineering. Whether you're preparing for competitive exams, honing your problem-solving skills, or simply looking to enhance your abilities in this field, our Digital Electronics MCQs are designed to help you grasp the core concepts and excel in solving problems.

In this section, you'll find a wide range of Digital Electronics mcq questions that explore various aspects of Digital Electronics problems. Each MCQ is crafted to challenge your understanding of Digital Electronics principles, enabling you to refine your problem-solving techniques. Whether you're a student aiming to ace Electronics and Communication Engineering tests, a job seeker preparing for interviews, or someone simply interested in sharpening their skills, our Digital Electronics MCQs are your pathway to success in mastering this essential Electronics and Communication Engineering topic.

Note: Each of the following question comes with multiple answer choices. Select the most appropriate option and test your understanding of Digital Electronics. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

So, are you ready to put your Digital Electronics knowledge to the test? Let's get started with our carefully curated MCQs!

Digital Electronics MCQs | Page 7 of 117

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Q61.
Consider the following statements in connection with CMOS inverter in figure where both the MOSFET are of enhancement type and both have a threshold voltage of 2 V

statements 1: T1 conducts when vi β‰₯ 2 V
statements 2: T1 is always in saturation when v0 = 0 V

Which of the following is correct?
Discuss
Answer: (a).Only statement 1 is true
Q62.
In number system e.g. 6, a β€œdecade” counter has to recycle to 0 at the sixth count. Which of the connections indicate below will realize this resetting? (a logic β€œ0” at the R inputs resets the counters)

a.

A

b.

B

c.

C

d.

D

Discuss
Answer: (c).C
Q63.
The logic realized by the circuit shown in figure
Discuss
Answer: (b).F = A βŠ• C
Q64.
The contents of stack location after the call operation will be
Discuss
Answer: (a).00000111
Q65.
In figure, R = 20KΞ© and C = 75 pF. The converter clock frequency will be
Discuss
Answer: (a).606 Hz
Q66.
In the switching circuit, switches A, B have value 0 for OFF, 1 for ON and the output Y has 0 volts for 1 volts, then the expression for Y is

a.

A

b.

B

c.

C

d.

D

Discuss
Answer: (c).C
Q67.
The output Y of the circuit shown in the figure is
Discuss
Answer: (a).(A + B) C + DE
Q68.
What is the result for following expression (map method)?
Discuss
Answer: (b).A + D
Q69.
The MOS symbols shown indicates:

1. that it is depletion type
2. that it is enhancement type
3. that it is n channel
4. that it is p channel
5. that electrons flow from D to S
6. that holes flow from D to S

The only true statements are
Discuss
Answer: (a).1, 3, 6
Q70.
For the logic circuit of the given figure the simplified Boolean expression is
Discuss
Answer: (a).A βŠ• B