Digital Electronics MCQs

Welcome to our comprehensive collection of Multiple Choice Questions (MCQs) on Digital Electronics, a fundamental topic in the field of Electronics and Communication Engineering. Whether you're preparing for competitive exams, honing your problem-solving skills, or simply looking to enhance your abilities in this field, our Digital Electronics MCQs are designed to help you grasp the core concepts and excel in solving problems.

In this section, you'll find a wide range of Digital Electronics mcq questions that explore various aspects of Digital Electronics problems. Each MCQ is crafted to challenge your understanding of Digital Electronics principles, enabling you to refine your problem-solving techniques. Whether you're a student aiming to ace Electronics and Communication Engineering tests, a job seeker preparing for interviews, or someone simply interested in sharpening their skills, our Digital Electronics MCQs are your pathway to success in mastering this essential Electronics and Communication Engineering topic.

Note: Each of the following question comes with multiple answer choices. Select the most appropriate option and test your understanding of Digital Electronics. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

So, are you ready to put your Digital Electronics knowledge to the test? Let's get started with our carefully curated MCQs!

Digital Electronics MCQs | Page 71 of 117

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Q701.
In a D latch

a.

a high D sets the latch and low D resets it

b.

a low D sets the latch and high D resets it

c.

race can occur

d.

none of the above

Discuss
Answer: (a).a high D sets the latch and low D resets it
Q702.
In floating point representation, mantissa is expressed in

a.

excess 3 notation

b.

gray code

c.

excess 32 notation

d.

2's complement

Discuss
Answer: (c).excess 32 notation
Q703.
In the generic microprocessor

a.

instruction cycle time period is shorter than machine cycle time period

b.

machine cycle time period is shorter than instruction cycle time period

c.

instruction cycle time period is exactly half of machine cycle time period

d.

instruction cycle time period is exactly equal to machine cycle time period

Discuss
Answer: (b).machine cycle time period is shorter than instruction cycle time period
Q704.
The fetching, decoding and executing of an instruction is broken down into several time intervals. Each of these intervals, involving one or more clock periods, is called a

a.

instruction cycle

b.

machine cycle

c.

process cycle

d.

none of the above

Discuss
Answer: (b).machine cycle
Q705.
Assertion (A): An encoder converts key dips to binary code.

Reason (R): An encoder has more inputs than output.

a.

Both A and R are correct and R is correct explanation of A

b.

Both A and R are correct but R is not correct explanation of A

c.

A is true, R is false

d.

A is false, R is true

Discuss
Answer: (b).Both A and R are correct but R is not correct explanation of A
Q706.
If a RAM has 34 bits in its MAR and 16 bits in its MDR, then its capacity will be

a.

32 GB

b.

16 GB

c.

32 MB

d.

16 MB

Discuss
Answer: (a).32 GB
Q707.
In a T flip-flop the output frequency is

a.

same as input frequency

b.

half of I/p frequency

c.

double the input frequency

d.

none

Discuss
Answer: (b).half of I/p frequency
Q708.
The access time of ROM using bipolar transistors is about

a.

1 sec

b.

1 mili sec

c.

1 ฮผ sec

d.

1 n sec

Discuss
Answer: (c).1 ฮผ sec
Q709.
In LIFO

a.

only the top of the stack is immediately accessible

b.

only the top of the stack is never accessible

c.

only the first-in is accessible

d.

only the first-in is not accessible

Discuss
Answer: (a).only the top of the stack is immediately accessible
Q710.
10 in BCD code represent

a.

10100

b.

1100

c.

010111

d.

None of the above

Discuss
Answer: (d).None of the above
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