Q. A full adder is to be implemented using half adders and OR gates. A 4 bit parallel adder without any initial carry requires

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Q. Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY) contain after ACI 0 A4 H?

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Q. If an inverter is placed at the input to an SR flip-flop, the result is

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Q. RAM can be expanded to

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Q. Large scale integration refers to

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Q. Which of the following statements is not true in regard to storage time of a diode?

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Q. Suppose a microprocessor has memory locations from 0000 to 3FFF, each storing I byte. How many bytes the memory can storing I bytes the memory can store?

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Q. If the number of information bits is m, the number of parity bits p in the Hamming code is given by equation

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Q. The race condition in NOR SR latch occurs when

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Q. Flag bits in arithmetic unit provide

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Q. How many interrupts are there of 8085 μP?

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Q. The main advantage of hexadecimal numbers is

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Q. T- FF used as a

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Q. A pulse train can be delayed by a finite number of clock periods by using

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Q. The disadvantage of counter type ADC as compared to comparator ADC is that

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Q. In 8421 Binary coded Decimal system the decimal number 237 is represented by

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Q. As access time is decreased, the cost of memory

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Q. Assertion (A): Hamming code is commonly used for error correction

Reason (R): In Hamming code the number of parity bits increases as the number of information bits increases.

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Q. A 2 bit binary multiplier can be implemented using

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Q. A microcomputer has memory locations from 0000 to FFFF, each storing 1 byte. How many bytes can be the memory store?

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