Q. A mode-10 counter can divide the clock frequency by a factor of

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Q. Which of the following binary numbers is equivalent to decimal 10?

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Q. A 4 bit synchronous counter has flip flops having propagation delay of 50 ns each and AND gates having propagation delay of 20 ns each. The maximum frequency of clock pulses can be

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Q. A counter has 4 flip flops. It divides the input frequency by

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Q. Out of 5 M x 8, 1 M x 16, 2 M x 16 and 3M x 8 memories, which memory can store more bits?

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Q. A 6 bit ladder A/D converter has input 101001. The output is (assume 0 = 0 V and 1 = 10 V)

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Q. A ripple counter has 4 bits and uses flip flops with propagation delay time of 25 ns. The maximum possible time for change of state will be

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Q. A counter has a modulus of 10. The number of flip flops is

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Q. Assertion (A): Master slave JK flip flop is commonly used in high speed synchronous circuitry

Reason (R): Master slave JK flip flop uses two JK flip flops in cascade.

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Q. ECL is a saturating logic.

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Q. The resolution of 4 bit counting ADC is 0.5 volt, for an Analog input of 6.6 volts. The digital output of ADC will be

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Q. 9's complement of 12₁₀ is

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Q. The minterm designation for ABCD is

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Q. Read the following statements

1. The circuitry of ripple counter is more complex than that of synchronous counter.
2. The maximum frequency of operation of ripple counter depends on the modulus of the counter.
3. The maximum frequency of operation of synchronous counter does not depend on the modulus of the counter.

Which of the above statements are correct?

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Q. An equivalent 2's complement representation of the 2's complement number 1101 is

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Q. In a 7 segment display the segments a, c, d, f, g are lit. The decimal number displayed will be

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Q. The minimum number of comparators required to build an 8 bit flash ADC is

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Q. For a Mod-64 synchronous counter the number of flip flops and AND gates needed is

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Q. A 4 bit DAC gives an output of 4.5 V for input of 1001. If input is 0110, the output is

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Q. Boolean expression for the output of XNOR (Equivalent) logic gate with inputs A and B is

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