Q. In a D latch

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Q. In floating point representation, mantissa is expressed in

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Q. In the generic microprocessor

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Q. The fetching, decoding and executing of an instruction is broken down into several time intervals. Each of these intervals, involving one or more clock periods, is called a

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Q. Assertion (A): An encoder converts key dips to binary code.

Reason (R): An encoder has more inputs than output.

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Q. If a RAM has 34 bits in its MAR and 16 bits in its MDR, then its capacity will be

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Q. In a T flip-flop the output frequency is

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Q. The access time of ROM using bipolar transistors is about

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Q. In LIFO

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Q. 10 in BCD code represent

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Q. In RAM, all the information can be obtained at the output with

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Q. The number of programmable 8 bit registers of 6800 are

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Q. The seven bit Hamming code received is 0010001. If even parity has been used, the correct code is

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Q. When two 4 bit parallel adders are cascaded we get

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Q. Consider the following features:

1. negative operands cannot be used
2. when immediate operand changes, the program should be reassembled
3. the program is difficult to read
4. the size of operand is restricted by word length of the computer

Disadvantages of immediate addressing include

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Q. Which binary addition is incorrect?

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Q. The inputs to a 4 channel MUX have the following bandwidths. Channel 1-50 Hz, channel 2-200 Hz. Channel 3-75 Hz. Channel 4-90 Hz. The theoretical minimum sampling rate of the MUX is

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Q. SSI is used in flip flops.

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Q. Two numbers in excess-3 code are added and the result is less than 8. To get equivalent binary

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Q. The ASCII code is for information interchange by a binary code for

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