Q. The inputs A, B, C of the given figure are applied to a 3 input NOR gate. The output is

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Q. The circuit of the given figure gives the output Y =

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Q. The number of product terms in the minimized sum of product expression obtained through the following K-map, where d, don't care.

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Q. For the logic circuit of the given figure the simplified Boolean expression is

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Q. In the circuit of the given figure, Y =

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Q. If A = B = 1, the outputs P and Q in the given figure are

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Q. In the given figure, Y =

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Q. The minimized version of logic circuit in the given figure is

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Q. In the given figure shows a negative logic AND gate. If positive logic is used this gate is equivalent to

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Q. The Boolean function/implemented in the figure using two I/P multiplexers is

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Q. For the logic circuit of the given figure the simplified Boolean equation

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Q. In the given figure RC = RL = 1 kΩ, then V0 =

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Q. Inputs A and B of the given figure are applied to a NAND gate. The output is LOW

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Q. For the NMOS gate in the given figure, F =

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Q. The logic circuit of the given figure is equivalent to

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Q. In the given figure shows a logic circuit. The minimum Boolean expression for this circuit is

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Q. The counter shown in the given figure is built using 4 -ve edge triggered toggle FFs. The FF can be set asynchronously when R = 0. The combinational logic required to realize a modulo-13 counter is

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Q. In the figure, the LED

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Q. Four inputs A, B, C, D are fed to a NOR gate. The output of NOR gate is fed to an inverter. The output of inverter is

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Q. The circuit in the figure is has two CMOS-NOR gates. This circuit functions as a

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